To answer AC's question a few moths later: "What's the big advantage with RISC over ARM or x86?"
Before discussing the advantage you need to discuss the difference. What's the difference between RISC over ARM or x86? Nothing.
a) ARM is RISC b) x86 is CISC only in the instruction set. The processors themselves have had far more in common with RISC processors since the days of the Pentium Pro.
The Cortex ranges are gathering decidedly unreduced instruction sets.
> b) x86 is CISC only in the instruction set. The processors themselves have had far more in common with RISC processors since the days of the Pentium Pro.
IIRC the original AMD K5 was a wrapped 29050 RISC processor with strapped on FPU (and it ran 50% faster than equivalent Intel CPUs for integer ops, which was what mattered most of the time)
The problem with having a massive instruction set is the increasing risk of errors in the conversion microcode, not all correctable. Intel CPUs may be RISC at their core but in their quest to try and beat out memory latencies (speculative prereading, etc) they got sloppy and now we're all paying the price.
If DRAM memory latencies were down in single digit nanoseconds for random access we wouldn't be having this entire thread because the insanely long pipelines wouldn't be needed. It's all very well clocking your ram at 3000MHz and getting out 8 words at a time, but when you have to wait a few ten/hundred-thousand CPU clocks for what you asked for, whatever you're doing has to wait too.
Ram has increasingly been the bottleneck for the last decade. At this point we need (affordable) lower latency system ram, not faster SSDs. A large chunk of CPU optimisation and complexity since 2002 has been geared at getting around unshortenable latencies. You can only get so far ahead of yourself before the wheels fall off.
Freedom demands Open Hardware also (Score:0)
OpenCores.org
J-Core.org
riscv.org
gaisler.com
OpenSPARC
There is a path forward, but it will take Fab relationships and people willing to test and then buy the first practical and fully open systems...
Re: (Score:4, Informative)
Not sure about others but some are available for purchase.
"SiFive has declared that 2018 will be the year of RISC V Linux processors" [slashdot.org] - Linux Now Has its First Open Source RISC-V Processor, Slashdot.
To answer AC's question a few moths later: "What's the big advantage with RISC over ARM or x86?"
Meltdown, Spetre.
Re: (Score:2)
To answer AC's question a few moths later: "What's the big advantage with RISC over ARM or x86?"
Before discussing the advantage you need to discuss the difference. What's the difference between RISC over ARM or x86? Nothing.
a) ARM is RISC
b) x86 is CISC only in the instruction set. The processors themselves have had far more in common with RISC processors since the days of the Pentium Pro.
CISC CPUs don't really exist in modern computing.
Re:Freedom demands Open Hardware also (Score:2)
> a) ARM is RISC
The Cortex ranges are gathering decidedly unreduced instruction sets.
> b) x86 is CISC only in the instruction set. The processors themselves have had far more in common with RISC processors since the days of the Pentium Pro.
IIRC the original AMD K5 was a wrapped 29050 RISC processor with strapped on FPU (and it ran 50% faster than equivalent Intel CPUs for integer ops, which was what mattered most of the time)
The problem with having a massive instruction set is the increasing risk of errors in the conversion microcode, not all correctable.
Intel CPUs may be RISC at their core but in their quest to try and beat out memory latencies (speculative prereading, etc) they got sloppy and now we're all paying the price.
If DRAM memory latencies were down in single digit nanoseconds for random access we wouldn't be having this entire thread because the insanely long pipelines wouldn't be needed. It's all very well clocking your ram at 3000MHz and getting out 8 words at a time, but when you have to wait a few ten/hundred-thousand CPU clocks for what you asked for, whatever you're doing has to wait too.
Ram has increasingly been the bottleneck for the last decade. At this point we need (affordable) lower latency system ram, not faster SSDs. A large chunk of CPU optimisation and complexity since 2002 has been geared at getting around unshortenable latencies. You can only get so far ahead of yourself before the wheels fall off.